SIC417CD-T1-E3【PDF 9/19 页】IC REG DL BCK/LINEAR SYNC 32MLPQ

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Sheet目录46

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Vishay Siliconix

SiC417

Document Number: 69062

S10-1367-Rev. D, 14-Jun-10

www.vishay.com

Ultrasonic Power-Save Operation

The SiC417 provides ultra-sonic power-save operation at

light loads, with the minimum operating frequency fixed at

25 kHz. This is accomplished using an internal timer that

monitors the time between consecutive high-side gate

pulses.

If the time exceeds 40 祍, DL drives high to turn the low-side

MOSFET on. This draws current from V

OUT

through the

inductor, forcing both V

OUT

and V

to fall. When V

drops

to the 500 mV threshold, the next DH on-time is triggered.

After the on-time is completed the high-side MOSFET is

turned off and the low-side MOSFET turns on, the low-side

MOSFET remains on until the inductor current ramps down

to zero, at which point the low-side MOSFET is turned off.

Because the on-times are forced to occur at intervals no

greater than 40 祍, the frequency will not fall below ~ 25 kHz.

Figure 5 shows ultra-sonic power-save operation.

Benefits of Ultrasonic Power-Save

Having a fixed minimum frequency in power-save has some

significant advantages as below:

" The minimum frequency of 25 kHz is outside the audible

range of human ear. This makes the operation of the

SiC417 very quiet.

" The output voltage ripple seen in power-save mode is

significant lower than conventional power-save, which

improves efficiency at light loads.

" Lower ripple in power-save also makes the power

component selection easier.

Figure 6 shows the behavior under power-save and

continuous conduction mode at light loads.

Smart Power-Save Protection

Active loads may leak current from a higher voltage into the

switcher output. Under light load conditions with power-

savepower-save enabled, this can force V

OUT

to slowly rise

and reach the over-voltage threshold, resulting in a hard

shutdown. Smart power-save prevents this condition.

When the FB voltage exceeds 10 % above nominal (exceeds

550 mV), the device immediately disables power-save, and

DL drives high to turn on the low-side MOSFET. This draws

current from V

OUT

through the inductor and causes V

OUT

fall. When V

drops back to the 500 mV trip point, a normal

switching cycle begins.

This method prevents a hard OVP shutdown and also cycles

energy from V

OUT

back to V

. It also minimizes operating

power by avoiding forced conduction mode operation.

Figure 7 shows typical waveforms for the smart power-save

feature.

Figure 4 - Forced Continuous Mode Operation

Figure 5 - Ultrasonic power-save Operation

FB ripple

voltage (VFB)

Inductor

current

DC load current

FB threshold

(500 mV)

On-time

)

DH on-time is triggered when

reaches the FB threshold

DL drives high when on-time is completed.

DL remains high until V

falls to the FB threshold.

FB ripple

voltage (VFB)

Inductor

current

(0A)

FB threshold

(500 mV)

On-time

)

DH on-time is triggered when

reaches the FB threshold

After the 40 祍 time-out, DL drives high if V

has not reached the FB threshold.

minimum f

25 kHz

Figure 6 - Ultrasonic Power-Save Operation Mode

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